Photonics over silicon have generated increasing interest over the years, primarily for optical transmission and optical interconnects in microelectronics circuits. Photonic devices such as waveguides, modulators and detectors are usually formed with silicon or polysilicon and germanium materials on a semiconductor-on-insulator (SOI) or bulk silicon wafer utilizing a complementary metal-oxide semiconductor (CMOS) process. One conventional method of integrating photonic devices into the CMOS process flow occurs at the front-end of the CMOS processing line. The typical front-end method involves first fabricating photonic devices on a substrate and then fabricating electronic devices (e.g., transistors) on a single CMOS wafer with different silicon material thicknesses for the photonic devices and the electronic devices.
Front-end integration of photonic devices presents the problem that the additional processing steps required to make the photonic devices can interfere with the conventional CMOS process flow. For instance, front-end integration of photonic devices on a silicon on insulator (SOI) wafer requires a substrate having a thicker (>1 p.m) buried oxide material and a thicker (>200 nm) silicon material compared to standard CMOS electronic SOI devices which may use a substrate having a <1 μm thick buried oxide material and a <200 nm thick silicon material. The additional processing steps required to make photonic devices in the front-end of the conventional CMOS processing line increases overall complexity and cost of an integrated circuit containing both CMOS electronics devices and photonics devices. In addition, for a side-by-side layout of CMOS electronic devices and photonics devices, the photonic devices take up valuable substrate space that could be used for electronic devices. Improved methods to make photonic devices in the back-end of a CMOS processing line are desired.